The present invention generally relates to processing a semiconductor substrate. In particular, the present invention relates to monitoring and measuring a wafer for defects prior to subjecting the wafer to resist processing in order to determine the source of such defects and to remove such defects prior to resist processing.
Achieving the objectives of miniaturization and higher packing densities continue to drive the semiconductor manufacturing industry toward improving semiconductor processing in every aspect of the fabrication process. Several factors and variables are involved in the fabrication process. For example, at least one and typically more than one photolithography process may be employed during the fabrication of a semiconductor device. Each factor and variable implemented during fabrication must be considered and improved in order to achieve the higher packing densities and smaller, more precisely formed semiconductor structures.
In general, lithography refers to processes for pattern transfer between various media. It is a technique used for integrated circuit fabrication in which a silicon slice, the wafer, is coated uniformly with a radiation-sensitive film, the photoresist, and an exposing source (such as optical light, X-rays, or an electron beam) illuminates selected areas of the surface through an intervening master template, the photoresist mask, for a particular pattern. The lithographic coating is generally a radiation-sensitized coating suitable for receiving a projected image of the subject pattern. Once the image is projected, it is indelibly formed in the coating. The projected image may be either a negative or a positive of the subject pattern. Exposure of the coating through the photoresist mask causes a chemical transformation in the exposed areas of the coating thereby making the image area either more or less soluble (depending on the coating) in a particular solvent developer. The more soluble areas are removed in the developing process to leave the pattern image in the coating as less soluble polymer. The resulting pattern image in the coating, or layer, may be at least one portion of a semiconductor device that contributes to the overall structure and function of the device.
Defects on the semiconductor device can occur at random as well as multiple locations on the device and at various stages while manufacturing the device. However, some defects are more problematic than others. For example, defects on the wafer which occur before depositing a photoresist on the wafer can linger and cause problems in subsequent processing (e.g., patterning the photoresist and processes using the malformed patterned photoresist such as an etch process and the like). Thus defects present at the start of resist processing (e.g., photolithography) tend to propagate themselves through subsequent processing. Furthermore, defects may also form on the wafer during wafer transfer from process to process.
Conventional defect detection systems which utilize wafer clean tools and endpoint detection techniques have been useful in cleaning the wafer before processing and detecting defects on the completed semiconductor device. However, defects can arise on the wafer while transferring it from the off-line wafer clean tools to the processing stage. In addition, end-point systems examine the completed or substantially completed device such that some defects may be undetectable. As can be seen, either defect detection system is unable to determine the source of the defect and/or remove the defects effectively. Defects may render the device partially or entirely inoperable. As a result, the wafer would need to be reworked or repaired in order remove such defects. Furthermore, since detection methods currently in use are incapable of distinguishing between sources of defects, the same or similar defects will arise again in future devices fabricated under similar process conditions. Overall, costs and product waste increase while production efficiency decreases due to conventional defect detection techniques. Accordingly, there is an unmet need for an effective defect detection and cleaning system that leads to increased product yields and decreased product costs and waste.
The present invention provides a system and method for integrated defect metrology and defect removal. More specifically, the present invention provides an on-line track system and method for monitoring a front and back side of a wafer for defects before and after a resist coat, cleaning a front and backside of a wafer using effective cleaning tools, and distinguishing between defects introduced before and after a resist coat process. According to one aspect of the present invention, the system and method involve on-track defect detection about the front and back sides of the wafer prior to a photoresist coating lithography process in order to distinguish between defects caused by wafer preparation and defects caused by resist processing.
This is accomplished in part by providing a track system having built-in particle defect monitor as well as a clean system. In particular, a wafer is placed on a track and directed to pass through an integrated defect metrology system before being subjected to any resist processing. The defect metrology system provides a pre-resist coat inspection of the front and back sides of the wafer for defects. Upon the detection of such, the defects can be measured and such measurements can be translated into a value or set of values understandable to a user by an analyzing system. In order to determine whether such defects (or level of defects) satisfies the acceptable defect limits, a comparison may be performed between the measured values and the accepted limits.
When measured defects exceed the acceptable defect limits or reach a range which is unacceptable by wafer standards, the wafer may be automatically routed to a wafer clean system. Using various water rinse techniques, the wafer clean system may reduce the amount of defects on the front and/or back sides of the wafer in preparation of the resist coat process. After the wafer is cleaned, it returns for a subsequent pre-resist coat inspection. When the wafer is determined to be substantially xe2x80x9ccleanxe2x80x9d, the wafer may proceed to a resist processing phase in order to receive a photoresist layer thereon and to continue with the fabrication process.
Following resist processing on the wafer, the front and back sides of the wafer can be inspected again to determine whether defects have accumulated on either side of the wafer such as for example during holding or transferring periods.
Alternatively, or in addition, some wafers can be discarded when their quantity of defects are beyond a cleanable or repairable range. This range may be determined by a user or by the type of device being made.
One aspect of the present invention relates to a system for a system for on-track monitoring of defects on a wafer before subjecting the water to resist processing. The system includes a device fabrication system comprising a photoresist coating system and at least one or more wafer processing components for producing a device from a wafer structure; a defect metrology system integrated with the device fabrication system operative to inspect at least one of a front side and a back side of the wafer structure for defects and to provide defect information about the wafer structure before it proceeds to the photoresist coating system; and a water cleaning system comprising at least one of a pre-resist coat cleaning module and a post-resist coat cleaning module, the system being operatively connected to the defect metrology system for reducing an amount of defects detected on the wafer structure such that after the amount of defects detected thereon are reduced, the wafer structure proceeds to the photoresist coating system component.
Another aspect of the present invention relates to a method for on-track monitoring of defects on a wafer before subjecting the wafer to resist processing. The method involves introducing a pre-resist coat wafer structure into a device fabrication system in order to yield a device product, the wafer structure having a front side and back side; monitoring at least one of the front side and the back side of the wafer structure for defects before a photoresist layer is formed on the wafer structure; measuring the defects found on the wafer structure in order to obtain defect information relating to the defects found on the wafer structure; comparing the defect information with threshold defect limits; and cleaning at least one of the front side and the back side of the wafer structure to reduce the defects found on that side of the wafer structure prior to forming a photoresist layer over the front side of the wafer structure.
Yet another aspect of the present invention relates to a An on-line method for real-time pre-resist coat and post-resist coat inspection of a wafer for defects. The method involves providing a pre-resist coat wafer structure, the wafer structure having a front side surface and a back side surface; inspecting at least one of the front side surface and the back side surface of the pre-resist coat water structure for defects; measuring the defects found on the pre-resist coat water structure in order to obtain defect information relating to the defects found on the wafer structure; cleaning at least one of the front side and the back side of the wafer structure to reduce the defects found on that side of the pre-resist coat wafer structure when the measured defects on that side are greater than the threshold defect limits; forming a photoresist layer over the front side of the pre-resist coat wafer structure to create a resist-coated wafer structure; inspecting the back side of the resist-coated wafer structure for defects without adversely affecting the front side of the resist-coated wafer structure; cleaning the beck side of the resist-coated wafer structure to remove any defects found thereon; and patterning the resist-coated wafer structure to thereby form one or more features in the wafer structure.